target-arm/cpu.h@arm_ldl_code;
target-arm/translate.c@disas_arm_insn;target-arm/cpu.h@arm_ldl_code	
target-arm/translate.c@gen_intermediate_code_internal;
target-arm/translate.c@disas_thumb_insn;target-arm/cpu.h@arm_lduw_code	
target-arm/cpu.h@cpu_get_tb_cpu_state;
target-arm/cpu.h@TARGET_PAGE_BITS;
target-arm/translate.c@DisasContext;
target-arm/helper.c@do_interrupt;target-arm/cpu.h@arm_lduw_code	target-arm/cpu.h@arm_ldl_code	
target-arm/cpu.h@ARM_TBFLAG_BSWAP_CODE_MASK;
disas.c@target_disas;
linux-user/main.c@cpu_loop;
target-arm/cpu.h@ARM_TBFLAG_BSWAP_CODE;
linux-user/qemu.h@image_info;
linux-user/main.c@main;
target-arm/cpu.h@CPUARMState;
target-arm/cpu.h@arm_lduw_code;
target-arm/translate.c@disas_thumb2_insn;target-arm/cpu.h@arm_lduw_code	
target-arm/helper.c@do_interrupt_v7m;target-arm/cpu.h@arm_lduw_code	
linux-user/elfload.c@load_elf_image;
target-arm/cpu.h@ARM_TBFLAG_BSWAP_CODE_SHIFT;
